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ISL98012
Data Sheet October 15, 2008 FN6654.0
1.8V Input PWM Step-Up Regulator
The ISL98012 is a high frequency, high efficiency step-up DC/DC regulator operated in fixed frequency PWM mode. With an integrated 1.4A MOSFET, it can deliver up to 600mA output current at up to 92% efficiency. The adjustable switching frequency is up to 750kHz, making it ideal for common boost applications. When shut down, it draws <1A of current. This feature, along with the minimum starting voltage of 1.8V, makes it suitable for portable equipment powered by 1 Lithium Ion, 3 to 4 NiMH cells, or 2 cells of alkaline battery. The ISL98012 is available in a 10 Ld MSOP package, with a maximum height of 1.1mm. With proper external components, the whole converter takes less than 0.25in2 PCB space. This device is specified for operation over the full -40C to +85C temperature range.
Features
* Up to 92% Efficiency * Up to 600mA IOUT * 4.5V < VOUT < 17V * 1.8V < VIN < 13.2V * Up to 750kHz Adjustable Frequency * <1A Shutdown Current * Adjustable Soft-Start * Low Battery Detection * Internal Thermal Protection * 1.1mm Max Height 10 Ld MSOP Package * Pb-Free (RoHS compliant)
Applications
* 1.8V to 15V Converters - OLED * 5V to 12V Converters * 3V to 5V and 3V to 12V Converters * TFT-LCD
Pinout
ISL98012 (10 LD MSOP) TOP VIEW
PGND 1 SGND 2 RT 3 EN 4 LBI 5 10 LX 9 VDD 8 FB 7 SS 6 LBO
* Portable Equipment
Ordering Information
PART NUMBER (Note) ISL98012IUZ ISL98012IUZ-T* PART MARKING 98012 98012 PACKAGE (Pb-Free) 10 Ld MSOP 10 Ld MSOP 10 Ld MSOP PKG. DWG. # MDP0043 MDP0043 MDP0043
ISL98012IUZ-TK* 98012
*Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL98012 Typical Application
L1 VIN (1.8V TO 9V) 10H D1 R4 5k 1 PGND LX 10 C5 22F VOUT (15V UP TO 200mA)
C1 10F
C4 0.1F R2 113k
2 R3 3 56k EN 1.8V TO 12V 4
SGND
VDD
9
RT
FB
8 C3
R1 10k
C10 4.7nF
EN
SS
7 20nF
5
LBI
LBO
6
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ISL98012
Absolute Maximum Ratings (TA = +25C)
FB, SS, RT, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V, 6.5V LX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V, +18V VDD, EN, LBI, LBO . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V, +12V
Thermal Information
Thermal Resistance (Typical, Note 1) JA (C/W) 10 Lead MSOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152 Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C Operating Junction Temperature: . . . . . . . . . . . . . . . . . . . . . +135C Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Maximum Operating Conditions
Maximum Operating Frequency. . . . . . . . . . . . . . . . . . . . . . . 750kHz Minimum Operating Frequency . . . . . . . . . . . . . . . . . . . . . . . 380kHz
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTE: 1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
.
Electrical Specifications
PARAMETER VIN VOUT IQ1 IQ2 VFB IFB DMAX ILIM IEN VLBI VOL-LBO ILEAK-LBO RDS(ON) ILEAK-SWITCH
VIN = 5V, VOUT = 12V, L = 10H, IOUT = 0mA, RT = 56k, TA = +25C, Unless Otherwise Specified. DESCRIPTION CONDITIONS R4 must ensure VDD 12V Note 2 VEN = 0, feedback resistors disconnected VEN = 2V, Continuous operation 1.29 0 < VFB < 1.5V 89.5 1 92 1.4 1 180 ILBO = 1mA VLBI = 250mV, VLBO = 5V At 12V output LX = 18V 3V < VIN < 6V, VOUT = 12V, no load IOUT = 50mA to 150mA 0 < VSS< 0.1V RT = 56k RT = 56k 600 1.6 0.5 0.4 1 12 1.34 670 750 220 0.1 0.02 220 1 250 0.2 2 1.4 1.33 MIN 1.8 4.5 TYP MAX 13.2 17 1 2 1.37 0.10 UNIT V V A mA V A % A A mV V A m A %/V % A V kHz V V
Input Voltage Range Output Voltage Range Quiescent Current - Shut-down Quiescent Current Feedback Voltage Feedback Input Bias Current Maximum Duty Cycle Current Limit - Max Peak Input Current Enable Input Bias Current LBI Threshold Voltage LBO Output Low LBO Output Leakage Current Switch On Resistance Switch Leakage Current
VOUT/VIN/VOUT Line Regulation VOUT/VOUT ISS VRT fOSC1 VHI_EN VLO_EN NOTE: 2. Minimum VOUT of 4.5V is tested with VIN = 1.8V. Load Regulation Soft Start Current Voltage at RT for Bias Current Switching Frequency EN Input High Threshold EN Input Low Threshold
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FN6654.0 October 15, 2008
ISL98012 Pin Descriptions
PIN NUMBER 1 2 3 4 5 6 7 8 9 10 PIN NAME PGND SGND RT EN LBI LBO SS FB VDD LX PIN FUNCTION Power ground; connected to the source of internal N-Channel power MOSFET Signal ground; ground reference for all the control circuitry; needs to have only a single connection to PGND Timing resistor to adjust the oscillation frequency of the converter. Resistor value on RT pin determines frequency. Range varies from RT = 49.9k for 750kHz and RT = 100k for 380kHz Chip enable; connects to logic HI (>1.6V) for chip to function Low battery input; connects to a sensing voltage, or connect to GND if function is not used Low battery detection output; connected to the open drain of a MOSFET; able to sink 1mA current Soft-start; connects to a capacitor to control the start-up of the converter. During start-up, VSS controls the current limit and hence the in-rush current. Voltage feedback input; needs to connect to resistor divider to decide VO Control circuit positive supply Inductor drive pin; connected to the drain of internal N-Channel power MOSFET
Block Diagram
VOUT = 15V 113k 10k 4.7nF 5k 0.1F 22F 10F 10A VIN
FB
VDD
LX
MAX_DUTY RT 56k REFERENCE GENERATOR VREF VRAMP PWM COMPARATOR
THERMAL SHUT-DOWN
PWM LOGIC
0.2
EN LBO 12A LBI
+
START-UP OSCILLATOR
+ ILOUT 7.2k 80m
220mV SGND SS 20nF PGND
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ISL98012 Typical Performance Curves
92 90 EFFICIENCY (%) EFFICIENCY (%) 250 300 90 88 86 84 82 60 0 50 100 150 200 IOUT (mA) 80 0 100 200 300 400 IOUT (mA) 500 600 700
80 VIN @ 1.8V VIN @ 3.3V
70
FIGURE 1. EFFICIENCY vs IOUT, VO = 15V
FIGURE 2. EFFICIENCY vs IOUT, VIN = 3.3V, VO = 5V
94 92 EFFICIENCY (%) 90 IDD (mA) 88 86 84 82 80 78 0 100 200 300 IOUT (mA) 400 500 600
1.6 1.5 1.4 1.3 1.2 1.1 1.0
VDD = 10V, VO = 12V TO 17V CONTINUOUS MODE
0.9 300
400
500
600
700
800
FREQUENCY (kHz)
FIGURE 3. EFFICIENCY vs IOUT, VIN = 5V, VO = 12V
FIGURE 4. IDD vs FS
80 750 RT = 51.1k RT = 71.5k FS (kHz) FREQUENCY (kHz) 70 60 50 40 30 VDD = 10V
RT = 100k
200 0 5 6 7 8 9
RT = 200k
10
11
12
40
60
80 R (k)
100
120
VDD (V)
FIGURE 5. FS vs VDD
FIGURE 6. FS vs RT
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FN6654.0 October 15, 2008
ISL98012 Typical Performance Curves
OUTPUT RIPPLE
(Continued)
OUTPUT RIPPLE
INPUT RIPPLE
INPUT RIPPLE
LX
LX
ILX
ILX
FIGURE 7. STEADY STATE OPERATION (INDUCTOR DISCONTINUOUS CONDUCTION), VIN = 3.3V, VO = 15V, IO < 1mA
FIGURE 8. STEADY STATE OPERATION (INDUCTOR CONTINUOUS CONDUCTION), VIN = 3.3V, VO = 15V, IO = 30mA
VIN VLX
50mV/DIV
VIN
50mV/DIV
10V/DIV
VLX VO IL
10V/DIV
VO IL
20mV/DIV
20mV/DIV
0.5A/DIV
0.5A/DIV
1.0s/DIV
1.0s/DIV
FIGURE 9. STEADY STATE OPERATION (INDUCTOR DISCONTINUOUS CONDUCTION), VIN = 5V, VO = 12V, IO = 30mA
FIGURE 10. STEADY STATE OPERATION (INDUCTOR CONTINUOUS CONDUCTION), VIN = 5V, VO = 12V, IO = 300mA
2V/DIV 5V/DIV VIN
ILX
VO 0.5A/DIV IL
0.5ms/DIV
FIGURE 11. POWER-UP, VIN = 3.3V, VO = 15V, IO = 30mA
FIGURE 12. POWER-UP, VIN = 5V, VO = 12V, IO = 300mA
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ISL98012 Typical Performance Curves
(Continued)
IO OUTPUT LOAD CURRENT VO
100mA/DIV
0.5V/DIV
0.2ms/DIV
FIGURE 13. LOAD TRANSIENT RESPONSE 10mA TO 30mA, VIN = 1.8V, FREQ = 56.2k, VO = 15V, IO = 10mA TO 30mA
FIGURE 14. LOAD TRANSIENT RESPONSE, VIN = 5V, VO = 12V, IO = 50mA TO 300mA
10mV/DIV
10mV/DIV
FIGURE 15. OUTPUT RIPPLE, VIN = 1.8V, VO = 15V, IO = 30mA
FIGURE 16. OUTPUT RIPPLE, VIN = 3.3V, VO = 15V, IO = 30mA
Applications Information
The ISL98012 is a fixed frequency step-up pulse-width modulation (PWM) regulator. The input voltage range is 1.8V to 13.2V and output voltage range is 4.5V to 17V. The switching frequency (up to 750kHz) is decided by the resistor connected to RT pin.
Soft-start is provided by ramping up the current limit comparator. An internal 12A current source charges the external CSS capacitor. The peak MOSFET current is limited by the voltage on this capacitor. This in turn controls the rising rate of the output voltage. The regulator goes through the same start-up sequence as well after the EN signal is pulled to HI.
Start-Up
During start-up, as VDD reaches a threshold of about 1.6V, a start-up oscillator generates a fixed duty-ratio of 0.5 to 0.7 at a frequency of several hundred kHz. This will boost the output voltage. When VDD reaches about 3.7V, the PWM comparator takes over control. The duty ratio will be decided by the least of the multiple-input direct summing comparator, the Max_Duty signal (about 92% duty-ratio), or the Current Limit Comparator.
Steady-State Operation
When the output reaches the preset voltage, the regulator operates in steady state. Depending on the input/output conditions and component values, the inductor operates in either continuous-conduction mode or discontinuous-conduction mode. In continuous-conduction mode, inductor current is a triangular waveform and LX voltage a pulse waveform. In discontinuous-conduction mode, inductor current has
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ISL98012
completely dried out before the MOSFET is turned on again. The input voltage source, the inductor, and the MOSFET and output diode parasitic capacitors form a resonant circuit. Oscillation will occur in this period. This oscillation is normal and will not affect regulation. At very low load, the MOSFET will skip pulses sometimes; this is normal. The inductor has peak and average current decided by Equations 4 and 5:
I L I LPK = I LAVG + -------2 IO I LAVG = -----------1-D (EQ. 4)
(EQ. 5)
Current Limit
The MOSFET current limit is nominally 1.4A and guaranteed 1A. This restricts the maximum output current IOMAX based on Equation 1:
V IN I L I OMAX = 1 - -------- x -------- 2 VO (EQ. 1)
The inductor should be chosen to handle this current. Furthermore, due to fixed internal compensation, it is recommended that maximum inductance of 10H and 15H be used in the 5V and 12V or higher output voltage, respectively. The output diode has an average current of IO and peak current is the same as the inductor's peak current. A Schottky diode is recommended and it should be able to handle those currents. The output voltage ripple can be calculated as Equation 6:
IO x D V O = --------------------- + I LPK x ESR FS x CO (EQ. 6)
where: * IL is the inductor peak-to-peak current ripple and is decided by Equation 2:
V IN D I L = --------- x ---L fS (EQ. 2)
* D is the MOSFET turn-on ratio and is decided by Equation 3:
V O - V IN D = ----------------------VO (EQ. 3)
Where: * CO is the output capacitance. * The ESR is the output capacitor ESR value. Low ESR capacitors should be used to minimize output voltage ripple. Multilayer ceramic capacitors (X5R and X7R) are preferred for output capacitors since they have a low ESR and small packages. Tantalum capacitors also can be used, but they take more board space and have higher ESR. A minimum of 22F output capacitor is sufficient for high output current application. For lower output current, the output capacitor can be smaller, like 4.7F. The capacitor should always have enough voltage rating. In addition to the voltage rating, the output capacitor should also be able to handle the RMS current, which is given by Equation 7:
2 I L 1 ( 1 - D ) x D + ------------------- x ----- x I LAVG 2 12 I LAVG
* fS is the switching frequency Table1 gives typical values:
TABLE 1. MAX CONTINUOUS OUTPUT CURRENTS VIN (V) 2 2 2 3.3 3.3 3.3 5 5 9 12 VO (V) 5 9 12 5 9 12 9 12 12 15 L (H) 10 10 10 10 10 10 10 10 10 10 fS (kHz) 750 750 750 750 750 750 750 750 750 750 IOMAX (mA) 360 190 140 600 310 230 470 340 630 670
I CORMS =
(EQ. 7)
Output Voltage
An external resistor divider is required to divide the output voltage down to the nominal reference voltage. The current drawn by the resistor network should be limited to maintain the overall converter efficiency. The maximum value of the resistor network is limited by the feedback input bias current and the potential for noise being coupled into the feedback pin. A resistor network less than 300k is recommended.
Component Considerations
It is recommended that CIN is larger than 10F. Theoretically, the input capacitor has a ripple current of IL. Due to high-frequency noise in the circuit, the input current ripple may exceed the theoretical value. A larger capacitor will reduce the ripple further.
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ISL98012
The boost converter output voltage is determined by the relationship in Equation 8:
R 2 V OUT = V FB x 1 + ------ R 1 (EQ. 8)
Layout Considerations
The layout is very important for the converter to function properly. power ground ( ) and signal ground ( ) should be separated to ensure that the high pulse current in the power ground never interferes with the sensitive signals connected to signal ground. They should only be connected at one point. The trace connected to pin 8 (FB) is the most sensitive trace. It needs to be as short as possible and in a "quiet" place, preferably between PGND or SGND traces. In addition, the bypass capacitor connected to the VDD pin needs to be as close to the pin as possible. The heat of the chip is mainly dissipated through the SGND pin. Maximizing the copper area around it is preferable. In addition, a solid ground plane is always helpful for the EMI performance. The demo board is a good example of layout based on these principles. Please refer to the ISL98012 Technical Brief for the layout. http://www.intersil.com/data/tb/tb429.pdf
where VFB slightly changes with VDD.
RC Filter
The maximum voltage rating for the VDD pin is 12V. An RC filter is recommended to clean the output ripple before bootstrapping the part. For bootstrapped applications with VOUT greater than 10V, R4 can drop VOUT for coupling into the VDD pin and is given by Equation 9:
V O - 10 R 4 = -------------------I DD (EQ. 9)
where IDD is shown in the IDD vs fS curve. Otherwise, R4 can be 10 to 51 with C4 = 0.1F.
Thermal Performance
The ISL98012 uses a fused-lead package, which has a reduced JA of +100C/W on a four-layer board and +115C/W on a two-layer board. Maximizing copper around the ground pins will improve the thermal performance. This chip also has internal thermal shut-down set at around +135C to protect the component.
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FN6654.0 October 15, 2008
ISL98012 Mini SO Package Family (MSOP)
0.25 M C A B D N A (N/2)+1
MDP0043
MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. 0.05 0.09 +0.07/-0.08 0.05 0.10 0.15 0.10 Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included.
E
E1
PIN #1 I.D.
A2 b c
B
1 (N/2)
D E E1
e C SEATING PLANE 0.10 C N LEADS b
H
e L L1 N
0.08 M C A B
L1 A c SEE DETAIL "X"
2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
A2 GAUGE PLANE L DETAIL X
0.25
A1
3(R)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 10
FN6654.0 October 15, 2008

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